Descrizione dell’offerta di lavoro

Senior engineer 5+ years experience in ASIC Verification.  Experience in the following is essential:VHDL or Verilog, Building Testbenchs for ASIC

Experience in the following are highly desirable: Systemverilog, Specman, ideally with UVM Systemverilog and Formal Property Checking. 

Attractive package on offer.

Dettagli dell’impiego
Settore:
Professional, scientific and technical activities
Campo d’occupazione:
Engineering professionals (excluding electrotechnology)
Work experience:
Work experience is required
Durata dell'esperienza lavorativa:
More than 5 years
Fascia salariale:
Not provided
Date of expiry:
Link for more information:
ASIC Verification

Informazioni sull’azienda

Chipright is a leading provider of internationally traded design services in the fields of micro-electronic design and development. We support customers design and verification activities with our network of consultants. Per saperne di più