Digital Design Engineer

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Workplace:

Sweden

Education level:

Number of positions:

Job offer description

Algorithm development and optimization for fixed point refinement in HW implementation.

Implementation of signal processing features (digital RF) at RTL level (VHDL)

Tools: Magillem, Atrenta Spgyglass, VCS, QuestaSim, Design Compiler

Job details

Sector:

Occupation field:

Work experience:

Work experience is required

Duration of work experience:

Between 2 and 5 years

Salary range:

Not provided

Date of expiry:

Wednesday, 9 July 2014

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